Cortex XpressTrack Workshop

Atmel and Nu Horizons will be holding a workshop to introduce Atmel’s new families of cutting edge 32-bit Cortex ARM microcontrollers, the ATSAM3 range, on 4th February 2010 in Nu Horizons newly opened training facility at their offices in Coventry.

The day will provide an introduction to ARM Cortex-M3 architecture including the items below:

Programming models and the Thumb2 instruction set
Interrupt execution, power management, and debugging features
Porting ARM7 to Cortex-M3

Atmel will also present their ATSAM3 roadmap including the ATSAM3U, ATSAM3S, ATSAM3N, and ATSAM3X families, the SAM3 peripherals and relevant evaluation kits.

The workshop includes hands-on sections enabling you to gain experience working with the ATSAM3U-EK evaluation boards.

The expected agenda is:

09:00	Registration
09:30	ATMEL ARM Overview
10:00	Cortex-M3 Overview
10:45	Coffee Break
11:00	SAM3 Technical Overview
12:30	Lunch
13:30	Hands-On 01 – “Getting Started”
13:45	Hands-On 02 – “SAM3U Demo”
14:30	Hands-On 03 – “Dual Bank”
14:45	Coffee Break
15:00	Hands-On 04 – “NVIC”
16:00	Hands-On 05 – “12Bit ADC + Accelerometer”
16:30	Summary and Wrap-up

The day will cost £99 and for this price we will provide the ATSAM3U-EK and ATSAM-ICE worth around £200. Atmel will provide the software tools on the day.

Thursday
4th February 2010
Coventry
Time: 9.00 to 16.30
lunch included

Nu Horizons Electronics Ltd. Eastwood Business Village, Harry Weston Road, Coventry, Warwickshire CV3 2UB

The day will cost £99 and for this price we will provide the ATSAM3U-EK and ATSAM-ICE worth around £200. Atmel will provide the software tools on the day.

Package price includes £179 of development tools – all for only £99 +VAT

We are also holding an introduction to Atmel’s touch technologies on the 3rd February, click here. If you would like to attend both days then we are offering a discounted cost of £179.

Atmel's SAM3U series is the world's first 32-bit ARM Cortex M3 Flash microcontroller with high-speed 480 Mbps USB + Phy for fast up/downloading of data, robust EMI tolerance, and plug-and-play high-speed serial interconnectivity. It features a 96 MHz maximum operating frequency and a high data-bandwidth architecture based on a 5-layer bus matrix with 22 DMA channels and distributed memory. The chips also include Dual-Bank Flash, providing safe in-application programming (IAP) including the boot program, 1.62 to 3.6V Operation, a Memory Protection Unit improving code protection and secures multi-application/task execution and High-End Analog features such as a differential input and programmable gain amplifier (PGA) on a 12-bit 1 Msps ADC